TY - GEN
T1 - Simulating Energy and Security Interactions in Semiconductor Manufacturing
T2 - 2022 Winter Simulation Conference, WSC 2022
AU - Weaver, Gabriel A.
AU - Shusko, Jacob
AU - Hasenbein, John J.
AU - Kutanoglu, Erhan
AU - Martinez-Medina, Gonzalo
AU - Castillo-Villar, Krystel K.
AU - Costa, Paulo C.G.
N1 - Funding Information:
Research was sponsored by the Cybersecurity Manufacturing Innovation Institute (CyManII) and was accomplished under Grant Number DE-EE0009046. The views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressed or implied, of the U.S. Government. The U.S. Government is authorized to reproduce and distribute reprints for Government purposes notwithstanding any copyright notation herein.
Publisher Copyright:
© 2022 IEEE.
PY - 2023/1/23
Y1 - 2023/1/23
N2 - Semiconductor manufacturing, particularly wafer fabrication, is a highly complex system of processes and workflows. Fabrication facilities must deal with re-entrant flows to support multiple types of wafers being produced simultaneously, each with their own deadlines and specifications. The manufacturing process itself depends upon the ability to control and programmatically adjust a variety of environmental conditions. In addition, wafer fabrication consumes large amounts of energy, particularly electricity. Emerging technologies including networked devices may help reduce the energy footprint but can introduce cybersecurity risks. Therefore, this paper presents its modeling and simulation framework to quantify tradeoffs between operational measures of performance, energy consumption, and cybersecurity risks. We augment the Intel Minifab model with an Industrial Control Systems (ICS) reference model based on the Purdue Enterprise Reference Architecture (PERA) as well as tool-level energy consumption data from a semiconductor manufacturing testbed.
AB - Semiconductor manufacturing, particularly wafer fabrication, is a highly complex system of processes and workflows. Fabrication facilities must deal with re-entrant flows to support multiple types of wafers being produced simultaneously, each with their own deadlines and specifications. The manufacturing process itself depends upon the ability to control and programmatically adjust a variety of environmental conditions. In addition, wafer fabrication consumes large amounts of energy, particularly electricity. Emerging technologies including networked devices may help reduce the energy footprint but can introduce cybersecurity risks. Therefore, this paper presents its modeling and simulation framework to quantify tradeoffs between operational measures of performance, energy consumption, and cybersecurity risks. We augment the Intel Minifab model with an Industrial Control Systems (ICS) reference model based on the Purdue Enterprise Reference Architecture (PERA) as well as tool-level energy consumption data from a semiconductor manufacturing testbed.
UR - https://www.scopus.com/pages/publications/85147455946
UR - https://www.mendeley.com/catalogue/4435cab0-b5f7-3ce0-9121-7651b240c1f4/
U2 - 10.1109/WSC57314.2022.10015365
DO - 10.1109/WSC57314.2022.10015365
M3 - Conference contribution
AN - SCOPUS:85147455946
SN - 9798350309713
T3 - Proceedings - Winter Simulation Conference
SP - 3477
EP - 3488
BT - Proceedings of the 2022 Winter Simulation Conference, WSC 2022
A2 - Feng, B.
A2 - Pedrielli, G.
A2 - Peng, Y.
A2 - Shashaani, S.
A2 - Song, E.
A2 - Corlu, C.G.
A2 - Lee, L.H.
A2 - Chew, E.P.
A2 - Roeder, T.
A2 - Lendermann, P.
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 11 December 2022 through 14 December 2022
ER -