Probability Estimation Using Monte Carlo Simulation of Boolean Logic on Hardware-Accelerated Platforms

Estimating probabilities in high-dimensional Boolean expressions is central to reliability
engineering, probabilistic risk assessment, and system-design tasks. Although exact symbolic methods are
theoretically precise, they often falter when model complexity soars. To address this scalability gap, we present
a Monte Carlo sampling technique that offloads computations to heterogeneous hardware via SYCL. By
encoding Boolean logic in bit-vectors and using hardware-accelerated bitwise operations our approach efficiently
processes millions of random samples to estimate the top event probability.
We demonstrate this method on the Aralia dataset—43 diverse fault trees exhibiting thousands of
basic events and complex gate types (K-of-N, XOR, etc.). On a modest consumer GPU, our sampling
achieves error margins comparable to exact solvers while drastically reducing run times.
The framework easily integrates into existing PRA workflows by embedding within the SCRAM
tool. Although specialized variance-reduction or importance-sampling strategies remain vital for extremely rare
events, our results highlight a flexible, computationally viable alternative to conventional symbolic and
approximate reliability methods, enabling faster iteration and broader applicability in large-scale Boolean models.