TY - GEN
T1 - An Integrated High-performance Computing and Digital Real-time Simulation Testbed to Benchmark Closed-loop Load Shedding Algorithms in Power Systems
AU - Sinha, M.
AU - Kadavil, R. G.
AU - Panwar, M.
AU - Hussain, T.
AU - Suryanarayanan, S.
AU - Alam, S. M.S.
AU - Papic, M.
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021/4/11
Y1 - 2021/4/11
N2 - An integrated testbed using digital real-time simulator (DRTS) and a high-performance computing (HPC) cluster is presented here to compare speed and performance of computational schemes to mitigate time-critical issues in electric power systems. The first approach in this testbed validation is taken by running a set of closed-loop load shedding algorithms to compare and contrast two paradigms of arresting cascading failure propagation. Two algorithms involve solving DC and AC power flow model-based optimization problems to compute load shedding at different buses, while a model-based stochastic search using parallel computing provides a viable alternative. The algorithms are implemented in the DRTS-HPC testbed for the IEEE 14-bus benchmark transmission system. As a proof of the concept, simulation results are presented for implementation of closed-loop load-shedding algorithms for cascading failures in the DRTS-HPC testbed.
AB - An integrated testbed using digital real-time simulator (DRTS) and a high-performance computing (HPC) cluster is presented here to compare speed and performance of computational schemes to mitigate time-critical issues in electric power systems. The first approach in this testbed validation is taken by running a set of closed-loop load shedding algorithms to compare and contrast two paradigms of arresting cascading failure propagation. Two algorithms involve solving DC and AC power flow model-based optimization problems to compute load shedding at different buses, while a model-based stochastic search using parallel computing provides a viable alternative. The algorithms are implemented in the DRTS-HPC testbed for the IEEE 14-bus benchmark transmission system. As a proof of the concept, simulation results are presented for implementation of closed-loop load-shedding algorithms for cascading failures in the DRTS-HPC testbed.
KW - Cascading failures
KW - digital real-time simulation
KW - high-performance computing
KW - load-shedding algorithms
UR - https://www.scopus.com/pages/publications/85113378619
U2 - 10.1109/NAPS50074.2021.9449781
DO - 10.1109/NAPS50074.2021.9449781
M3 - Conference contribution
AN - SCOPUS:85113378619
T3 - 2020 52nd North American Power Symposium, NAPS 2020
BT - 2020 52nd North American Power Symposium, NAPS 2020
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 52nd North American Power Symposium, NAPS 2020
Y2 - 11 April 2021 through 13 April 2021
ER -