A programming model for reconfigurable computing based in functional concurrency

William L. Harrison; Ian Graves; Adam Procter; Michela Becchi; Gerard Allwein

doi:10.1109/ReCoSoC.2016.7533911

A programming model for reconfigurable computing based in functional concurrency

William L. Harrison
, Ian Graves
, Adam Procter
, Michela Becchi
, Gerard Allwein

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

6 Scopus citations

Abstract

FPGA programmability remains a concern with respect to the broad adoption of the technology. One reason for this is simple: FPGA applications are frequently implementations of concurrent algorithms that could be most directly rendered in concurrent languages, but there is little or no first-class support for concurrent applications in conventional hardware description languages. It stands to reason that FPGA programmability would be enhanced in a hardware description language with first-class concurrency. The starting point for this paper is a functional hardware description language with built-in support for concurrency called ReWire. Because it is a concurrent functional language, ReWire supports the elegant expression of common concurrency paradigms; we illustrate this with several case studies.

Original language	American English
Title of host publication	2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)
Publisher	IEEE
Pages	1-8
Number of pages	8
ISBN (Print)	978-1-5090-2521-3
DOIs	https://doi.org/10.1109/ReCoSoC.2016.7533911
State	Published - Jun 29 2016
Externally published	Yes
Event	2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) - Tallinn, Estonia Duration: Jun 27 2016 → Jun 29 2016

Conference

Conference	2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)
Period	06/27/16 → 06/29/16

Keywords

Hardware
Concurrent computing
Clocks
Parallel processing
Programming
Software engineering
Computational modeling

Access to Document

10.1109/ReCoSoC.2016.7533911

https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7533911

Cite this

@inproceedings{432d595038b145d1be38e6368acdd796,

title = "A programming model for reconfigurable computing based in functional concurrency",

abstract = "FPGA programmability remains a concern with respect to the broad adoption of the technology. One reason for this is simple: FPGA applications are frequently implementations of concurrent algorithms that could be most directly rendered in concurrent languages, but there is little or no first-class support for concurrent applications in conventional hardware description languages. It stands to reason that FPGA programmability would be enhanced in a hardware description language with first-class concurrency. The starting point for this paper is a functional hardware description language with built-in support for concurrency called ReWire. Because it is a concurrent functional language, ReWire supports the elegant expression of common concurrency paradigms; we illustrate this with several case studies.",

keywords = "Hardware, Concurrent computing, Clocks, Parallel processing, Programming, Software engineering, Computational modeling",

author = "Harrison, \{William L.\} and Ian Graves and Adam Procter and Michela Becchi and Gerard Allwein",

year = "2016",

month = jun,

day = "29",

doi = "10.1109/ReCoSoC.2016.7533911",

language = "American English",

isbn = "978-1-5090-2521-3",

pages = "1--8",

booktitle = "2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)",

publisher = "IEEE",

note = "2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) ; Conference date: 27-06-2016 Through 29-06-2016",

}

Harrison, WL, Graves, I, Procter, A, Becchi, M & Allwein, G 2016, A programming model for reconfigurable computing based in functional concurrency. in 2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)., 7533911, IEEE, pp. 1-8, 2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 06/27/16. https://doi.org/10.1109/ReCoSoC.2016.7533911

A programming model for reconfigurable computing based in functional concurrency. / Harrison, William L.; Graves, Ian; Procter, Adam et al.
2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC). IEEE, 2016. p. 1-8 7533911.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A programming model for reconfigurable computing based in functional concurrency

AU - Harrison, William L.

AU - Graves, Ian

AU - Procter, Adam

AU - Becchi, Michela

AU - Allwein, Gerard

PY - 2016/6/29

Y1 - 2016/6/29

N2 - FPGA programmability remains a concern with respect to the broad adoption of the technology. One reason for this is simple: FPGA applications are frequently implementations of concurrent algorithms that could be most directly rendered in concurrent languages, but there is little or no first-class support for concurrent applications in conventional hardware description languages. It stands to reason that FPGA programmability would be enhanced in a hardware description language with first-class concurrency. The starting point for this paper is a functional hardware description language with built-in support for concurrency called ReWire. Because it is a concurrent functional language, ReWire supports the elegant expression of common concurrency paradigms; we illustrate this with several case studies.

AB - FPGA programmability remains a concern with respect to the broad adoption of the technology. One reason for this is simple: FPGA applications are frequently implementations of concurrent algorithms that could be most directly rendered in concurrent languages, but there is little or no first-class support for concurrent applications in conventional hardware description languages. It stands to reason that FPGA programmability would be enhanced in a hardware description language with first-class concurrency. The starting point for this paper is a functional hardware description language with built-in support for concurrency called ReWire. Because it is a concurrent functional language, ReWire supports the elegant expression of common concurrency paradigms; we illustrate this with several case studies.

KW - Hardware

KW - Concurrent computing

KW - Clocks

KW - Parallel processing

KW - Programming

KW - Software engineering

KW - Computational modeling

UR - https://ieeexplore.ieee.org/document/7533911/

U2 - 10.1109/ReCoSoC.2016.7533911

DO - 10.1109/ReCoSoC.2016.7533911

M3 - Conference contribution

SN - 978-1-5090-2521-3

SP - 1

EP - 8

BT - 2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)

PB - IEEE

T2 - 2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)

Y2 - 27 June 2016 through 29 June 2016

ER -

A programming model for reconfigurable computing based in functional concurrency

Abstract

Conference

Keywords

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