A mathematical model of SiC detector as power monitors

A mathematical model has been developed to optimize with respect to speed and resolution the use of SiC semiconductor detectors as power monitors for Generation IV power reactors. This model is described herein, from the SiC detector to the discriminator at the channel's end, and results of the model calculations are presented. The channel model includes a SiC detector (consisting of LiF, Al, Au, and SiC layers), preamplifier, amplifier, and discriminator models. The four-layer diode detector has been simulated with TRIM, and its output current has been calculated as a function of time using the TRIM results and a MATLAB code. The detector output current was modeled as being applied directly to a voltage sensitive preamplifier by including its transfer function in s-space in the MATLAB code. Finally, an SCA was modeled in MATLAB as the last component in the channel. The overall performance of the system is assessed by comparing curves of the fraction of counts that are lost versus the true count rate, for the modeled voltage sensitive preamplifier with a similar curve for a perfect voltage sensitive preamplifier. We conclude that the discriminator restricts the system count rate and that by using a discriminator with a shorter dead time, one can count pulses with rates higher than 10 8 cps.